1. Field of the Invention
The present invention relates to a semiconductor memory device and more particularly to an improved sense amp circuit.
2. Description of the Related Art
A sense amp circuit in a semiconductor memory such as a flash memory fundamentally detects the presence/absence or large/small of cell current flowing based on data in a memory cell to determine the data. The sense amp circuit is generally connected to data lines (bit lines), which are connected to a plurality of memory cells. The sense amp circuit is roughly classified by the sense scheme into a voltage detection type and a current detection type.
The sense amp circuit of the voltage detection type pre-charges a bit line isolated from memory cells up to a certain voltage, then discharges the bit line through a selected memory cell, and detects the discharged state of the bit line at a sense node connected to the bit line. At the time of data sensing, the bit line is isolated from a current path load to detect a bit line voltage determined from cell data. An NAND-type flash memory usually employs this sense amp scheme (see JP-A 2000-076882, for example).
The sense amp circuit of the current detection type tries for data sense to feed read current in a memory cell via a bit line. Also in this case, however, cell data determines the bit line voltage and finally data determination at a sense node connected to the bit line leads to detection of a difference in voltage based on the difference in cell current (see JP-A 10-228792, for example).
The sense amp circuit of the voltage detection type and the sense amp circuit of the current detection type generally have the following advantages and disadvantages. The voltage detection type utilizes bit line charge and discharge and accordingly requires less power consumption. To the contrary, in a mass-storage memory with a large bit line capacitance, it requires a long charge and discharge time, which makes high-speed sense difficult. In addition, the bit line voltage has relatively large amplitude in accordance with the cell data, which causes a problem associated with noises between adjacent bit lines.
The sense amp circuit of the current detection type in contrast is capable of high-speed sensing by feeding read current in a memory cell via a bit line for data sense. In addition, a clamp transistor (pre-sense amp) is located between the bit line and the sense node to reduce the amplitude of the bit line voltage depending on the cell data and accordingly have a strength against noises between the bit lines. Achievement of these advantages, however, increases power consumption.
Mass-storage NAND-type flash memories have widely employed the sense amp circuit of the voltage detection type. If the storage capacity is increased progressively, however, achievement of high-speed sense with suppressed power consumption becomes a critical subject to be solved.